Implementing a (virtual) multiplying chip

Tag: binary , chip Author: sun26 Date: 2014-02-06

I'm implementing a (virtual) multiplier chip for 16-bit numbers represented using 2's complement (numbers range from -32768 to 32767). The way I did it was:

  1. Save the sign bit of both numbers
  2. Convert both numbers to positive numbers
  3. Multiply the numbers using left and right shifts (long grade school-type multiplication)
  4. Adjust the final product's sign according to the saved sign.

This method works well in most cases, but fails in cases such as 8192*(-4), since when positive 8192*4=32678, and that is an overflow for positive numbers.

Does anyone have an idea how I could fix this problem?